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INTEGRATED CIRCUITS
74F597 8-bit shift register with input storage registers
Product specification IC15 Data Handbook 1991 Sep 13
Philips Semiconductors
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
FEATURES
* High impedance PNP base inputs for reduced loading
(20A in High and Low states)
PIN CONFIGURATION
D1 D2 D3 D4 D5 D6 D7 GND 1 2 3 4 5 6 7 8 16 VCC 15 D0 14 DS 13 SHLD 12 STCP 11 SHCP 10 SHRST 9 QS
* 8-bit parallel storage register * 3-State output buffers * Shift register has asynchronous direct overriding reset * Shift load SHLD is functional when SHCP is Low and locked out
when SHCP is High
* Guaranteed shift frequency DC to 105MHz
DESCRIPTION
The 74F597 consists of an 8-bit storage register feeding a parallel-in/serial-in, serial-out 8-bit shift register. The storage register and shift register have separate positive edge triggered clocks. The shift register has asynchronous reset and when SHCP is Low, it has asynchronous load. The shift register load function has been modified to load when both SHLD and SHCP are Low. When SHCP is High the shift register load operation is not performed. Data will be properly shifted on the rising edge of SHCP when SHLD is High.
SF00366
TYPE 74F597
TYPICAL fMAX 135MHz
TYPICAL SUPPLY CURRENT (TOTAL) 42mA
ORDERING INFORMATION
DESCRIPTION 16-pin plastic DIP 16-pin plastic SO COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F597N N74F597D PKG DWG # SOT38-4 SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS Ds D0-D7 SHCP STCP SHLD SHRST Qs Serial data input Parallel data inputs Shift register clock pulse input Storage register clock pulse input Shift register load input (active Low) Shift register reset input (active Low) Serial data output DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 50/33 LOAD VALUE HIGH/LOW 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20A in the High state and 0.6mA in the Low state.
1991 Sep 13
2
853-1556 03964
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
LOGIC SYMBOL
14 15 1 2 3 4 5 6 7
IEC/IEEE SYMBOL (IEEE/IEC)
SRG8 10 11 R C3/ ! C2 C1 3D 1D 2D
Ds 10 11 12 13 SHRST SHCP STCP SHLD
D0
D1
D2
D3 D4 D5
D6
D7
13 12 14 15
Qs
1 2
14
3 4
VCC = Pin 16 GND = Pin 8
SF01107
5 6 7 9
SF01108
FUNCTION TABLE
INPUTS OPERATING MODES STCP X X X H L X = = = = = SHCP X L L L X H SHLD X L L L H H X SHRST X H H L L H H Data loaded to storage registers Data loaded from inputs to shift register Data transferred from storage registers to shift registers Invalid logic, state of shift register indeterminate when signals removed Shift register cleared Shift register clocked, Qn=Qn-1, Q0=Ds Hold
High voltage level Low voltage level Don't care Low-to-High clock transition Not a Low-to-High clock transition
1991 Sep 13
3
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
LOGIC DIAGRAM
10 SHRST SHCP SHLD STCP Ds D0 11 13 12 14 15 1D S C1 R C2 2D
D1
1
1D S C1 R
C2 2D
D2
2
1D S C1 R
C2 2D
D3
3
1D S C1 R
C2 2D
D4
4
1D S C1 R
C2 2D
D5
5
1D S C1 R
C2 2D
D6
6 1D S C1 R
C2 2D
D7
7 1D S C1 R
C2 2D
9 Qs
VCC = Pin 16 GND = Pin 8
SF01109
1991 Sep 13
4
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to +VCC 40 0 to +70 -65 to +150 UNIT V V mA V mA C C
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER MIN 4.5 2.0 0.8 -18 -1 20 +70 NOM 5.0 MAX 5.5 V V V mA mA mA C UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL PARAMETER TEST CONDITIONSNO TAG VCC = MIN, VIL = MAX MAX, VIH = MIN 10%VCC IO = -1mA 1mA OH 5%VCC 10%VCC 5%VCC MIN 2.5 2.7 3.4 0.30 0.30 -0.73 0.50 0.50 -1.2 100 20 -20 -60 43 VCC = MAX 41 -150 65 60 TYP
NO TAG
MAX
UNIT
V V V V V A A A mA mA mA
VO OH
High-level High level output voltage
VO OL VIK II IIH IIL IOS ICC
Low-level Low level output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output currentNO TAG Supply current (total) ICCH ICCL
VCC = MIN, VIL = MAX, , , VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
1991 Sep 13
5
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25C CL = 50pF, RL = 500 MIN fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPHL Maximum clock frequency Propagation delay SHCP to Qs Propagation delay SHLD to Qs Propagation delay STCP to Qs Propagation delay SHRST to Qs Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG 120 7.0 6.0 8.0 6.0 7.5 8.0 2.5 TYP 135 8.5 7.5 9.5 7.5 9.5 9.5 5.5 11.0 10.0 12.0 10.0 11.5 12.0 9.0 MAX VCC = +5V 10% Tamb = 0C to +70C CL = 50pF, RL = 500 MIN 105 6.0 5.5 7.0 5.5 6.5 7.5 2.5 12.5 10.5 13.5 11.0 13.0 13.0 9.5 MAX MHz ns ns ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25C CL = 50pF, RL = 500 MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) ts(H) th(L) ts(H) tW(H) tW(L) tW(H) tW(L) tW(L) tW(L) tREC Setup time, High or Low Dn to STCP Hold time, High or Low Dn to STCP Setup time, High or Low Ds to SHCP Hold time, High or Low Ds to SHCP Setup time, High STCP to SHLD Hold time, Low STCP to SHLD (hold mode) Setup time, High SHLD to SHCP SHCP Pulse width High or Low STCP Pulse width High or Low SHRST Pulse width, Low SHLD Pulse width, Low Recovery time, SHRST to SHCP Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform 4 Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG Waveform NO TAG 1.0 1.5 2.0 2.0 1.0 1.5 1.5 2.0 8.5 0.0 6.0 4.5 4.5 4.5 4.5 4.5 4.5 2.0 TYP MAX VCC = +5V 10% Tamb = 0C to +70C CL = 50pF, RL = 500 MIN 1.5 2.0 2.0 3.0 1.0 2.0 2.0 2.5 9.0 0.0 6.5 5.5 4.5 5.0 4.5 4.5 4.5 2.5 MAX ns ns ns ns ns ns ns ns ns ns ns ns UNIT
1991 Sep 13
6
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
TYPICAL TIMING DIAGRAM
SHRST
SHLD
SHCP
STCP
Ds
D0
Don't care
D1
Don't care
D2
Don't care
D3
Don't care
D4
Don't care
D5
Don't care
D6
Don't care
D7
Don't care
Qs
SF01110
1991 Sep 13
7
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
AC WAVEFORMS
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1/fMAX STCP, SHCP, SHLD SHRST SHRST VM tw(H) tPHL tw(L) tPLH VM SHCP tPHL VM Qs VM VM VM trec VM
QS
VM
SF00371
SF01112
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Widths, and Maximum Clock Frequency, Shift Register Reset and Load Inputs to Serial Data Output
Waveform 2. Propagation Delay, Shift Register Reset and Load Inputs to Serial Data Output, Shift Register Reset and Load Inputs to Shift Register Clock Pulse Input Recovery Time
Dn, Ds SHCP, SHLD
VM ts(H)
VM th(H)
VM ts(L)
VM th(L)
STCP
VM ts(H)
VM th(L) VM VM
SHCP, STCP, SHLD
VM
VM
SHLD, SHCP
SF01113
SF01114
Waveform 3. Setup and Hold Times
Waveform 4. Setup and Hold Time
TEST CIRCUIT AND WAVEFORMS
VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00006
1991 Sep 13
8
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
1991 Sep 13
9
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
1991 Sep 13
10
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
NOTES
1991 Sep 13
11
Philips Semiconductors
Product specification
8-bit shift register with input storage registers
74F597
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05144
Philips Semiconductors
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